1. Field of the Invention
The present invention generally relates to multiprocessor systems, and particularly relates to a multiprocessor system which manages exclusive control of shared resources.
2. Description of the Related Art
In the multiprocessor environments, i.e., in the environments in which systems are comprised of a plurality of processors, resources such as memories provided on a shared bus are shared by a plurality of processors. When a processor uses a memory, there may be a need under certain circumstances to exclusively use the memory for a predetermined duration by preventing the other processors from accessing the memory. Such a need arises because the consistency of the system cannot be maintained if the other processors access the memory or change the data during the ongoing transaction, for example. In order to grant exclusive use of shared resources, the control of the resources by use of a semaphore register is typically performed.
In the control of resources by use of a semaphore register, a processor wishing to gain exclusive control of a memory refers to a semaphore flag prior to access to the memory. If the flag is not on, it is ascertained that other processors are not using the memory. In such a case, the processor changes the flag to an on state so as to notify the other processors of its exclusive use of the memory, followed by accessing the memory. During the period in which the flag is on, the other processors cannot access the memory. When the use of the memory comes to an end, the processor having been using the memory cancels the on setting of the semaphore flag.
When a semaphore register is used, rigid control of the flag is necessary. A processor may refer to a semaphore flag, and may set the flag to an on state after confirming that the flag is not on, for example. If there is a time gap between the action of referring to the flag and the action of setting the flag, another processor may refer to the semaphore flag during this time gap. In such a case, the latter processor having referred to the semaphore flag ascertains that the memory is available because the flag is not on.
In order to avoid such a situation, the checking and setting of a semaphore flag is typically performed by use of a special access method called atomic LOAD/STORE. In this method, a read operation and a write operation are performed together as a single indivisible unit operation, i.e., are performed in a single bus cycle. Since the checking and setting of a flag is performed by carrying out a read operation and a write operation in a single bus cycle, this method achieves rigid flag control.
Patent Document 1 discloses a configuration in which a mechanism for managing exclusive control is provided between processors and a shared connection network. Further, Patent Documents 2 through 6 disclose a configuration which manages exclusive control by use of a special locking mechanism.
[Patent Document 1]
Japanese Patent Application Publication No. 2000-187652
[Patent Document 2]
Japanese Patent Application Publication No. 5-225117
[Patent Document 3]
Japanese Patent Application Publication No. 6-110847
[Patent Document 4]
Japanese Patent Application Publication No. 8-314869
[Patent Document 5]
Japanese Patent Application Publication No. 9-282291
[Patent Document 6]
Japanese Patent Application Publication No. 4-343159
In exclusive control methods used by related-art multiprocessor systems, a typical configuration is that the semaphore flag is provided in the memory space of a shared memory. Because of such a configuration, each processor needs to access the semaphore flag in the shared memory through a bus. This makes it necessary to attend to access arbitration at the time of bus access. If a cache mechanism or the like is provided between the processor and the shared memory, the processor needs to access the shared memory by going through a lengthy access path. This may further add to the access time. There is thus a problem in that processing time required for exclusive control becomes lengthy.
Accordingly, there is a need for a multiprocessor system in which the processing time required for exclusive control is short.